元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996D8-Bit ResolutionD2.7 V to 3.6 V VCCDEasy Microprocessor Interface orDDDDDDDDTLV0834...D OR N PACKAGE(TOP VIEW) Standalone OperationOperates Ratiometrically or With VCCReference4- or 8-Channel Multiplexer Options WithAddress LogicInput Range 0 V to VCC With VCC ReferenceRemote Operation With Serial Data LinkInputs and Outputs Are Compatible WithTTL and MOSConversion Time of 32 µs atf(CLK) = 250 kHzFunctionally Equivalent to the ADC0834and ADC0838 at 3-V Supply Without theInternal Zener Regulator NetworkTotal Unadjusted Error...±1 LSBNCCSCH0CH1CH2CH3DGTL GND1234 567141312111098VCCDICLKSARSDOREFANLG GNDTLV0838...DW OR N PACKAGE(TOP VIEW)descriptionThese devices are 8-bit successive-approximationanalog-to-digital converters, each with aninput-configurable multichannel multiplexer andserial input/output. The serial input/output isconfigured to interface with standard shift registersor microprocessors. Detailed information oninterfacing with most popular microprocessors isreadily available from the factory.CH0CH1CH2CH3CH4CH5CH6CH7COMDGTL GND1234 5671020191817161514131211VCCNCCSDICLKSARSDOSEREFANLG GNDThe TLV0834 (4-channel) and TLV0838 (8-channel) multiplexer is software configured for single-ended ordifferential inputs as well as pseudo-differential input assignments. The differential analog voltage input allowsfor common-mode rejection or offset of the analog zero input voltage value. In addition, the voltage referenceinput can be adjusted to allow encoding of any smaller analog voltage span to the full 8 bits of resolution.The TLV0834C and TLV0838C are characterized for operation from 0°C to 70°C. The TLV0834I and TLV0838Iare characterized for operation from –40°C to 85°C.AVAILABLE OPTIONSPACKAGETA0°C to 70°C–40°C to 85°CSMALLOUTLINE(D)TLV0834CDTLV0834IDSMALL OUTLINE(DW)TLV0838CDWTLV0838IDWPLASTIC DIP(N)TLV0834CNTLV0834INTLV0838CNTLV0838INPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Copyright © 1996, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•1元器件交易网www.cecb2b.comSLAS147 – SEPTEMBER 1996 2functional block diagramCLKCSDIStartFlip-FlopCLKRCSSARSPOST OFFICE BOX 655303 DALLAS, TEXAS 75265(see Note A)D5-Bit Shift RegisterSCLKRSELECT0 SELECT1ODD\\EVENSGL\\DIFSTARTTLC0838OnlySECircuitsTo InternalCH0CLKTLC0834CH1CH2CH3AnalogSTLC0838CH4MUXTimeCH5DelayRCH6CH7COMENCSComparatorCSCSCSENRRCSREFCLKRLadderandBits 0–7LogicSARBits 0–79-BitEOCCLKDODecoderandLatchShiftDBit 1RegisterMSBLSBOneFirstFirstShotNOTE A: For the TLC0834, DI is input directly to the D input of SELECT1; SELECT0 is forced to a high.3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROLTLV0834C, TLV0834I, TLV0838C, TLV0838I •元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996functional descriptionThe TLV0834 and TLV0838 use a sample-data-comparator structure that converts differential analog inputs bya successive-approximation routine. Operation of both devices is similar with the exception of SE, an analogcommon input, and multiplexer addressing. The input voltage to be converted is applied to a channel terminaland is compared to ground (single ended), to an adjacent input (differential), or to a common terminal (pseudodifferential) that can be an arbitrary voltage. The input terminals are assigned a positive (+) or negative (–)polarity. When the signal input applied to the assigned positive terminal is less than the signal on the negativeterminal, the converter output is all zeros.Channel selection and input configuration are under software control using a serial-data link from the controllingprocessor. A serial-communication format allows more functions to be included in a converter package with noincrease in size. In addition, it eliminates the transmission of low-level analog signals by locating the converterat the analog sensor and communicating serially with the controlling processor. This process returns noise-freedigital data to the processor.A particular input configuration is assigned during the multiplexer-addressing sequence. The multiplexeraddress shifts into the converter through the data input (DI) line. The multiplexer address selects the analoginputs to be enabled and determines whether the input is single ended or differential. When the input isdifferential, the polarity of the channel input is assigned. Differential inputs are assigned to adjacent channelpairs . For example, channel 0 and channel 1 may be selected as a differential pair. These channels cannot actdifferentially with any other channel. In addition to selecting the differential mode, the polarity may also beselected. Either channel of the channel pair may be designated as the negative or positive input.The common input on the TLV0838 can be used for a pseudo-differential input. In this mode, the voltage on thecommon input is considered to be the negative differential input for all channel inputs. This voltage can be anyreference potential common to all channel inputs. Each channel input can then be selected as the positivedifferential input. This feature is useful when all analog circuits are biased to a potential other than ground.A conversion is initiated by setting CS low, which enables all logic circuits. CS must be held low for the completeconversion process. A clock input is then received from the processor. On each low-to-high transition of theclock input, the data on DI is clocked into the multiplexer-address shift register. The first logic high on the inputis the start bit. A 3- to 4-bit assignment word follows the start bit. On each successive low-to-high transition ofthe clock input, the start bit and assignment word are shifted through the shift register. When the start bit isshifted into the start location of the multiplexer register, the input channel is selected and conversion starts. TheSAR status output (SARS) goes high to indicate that a conversion is in progress, and DI to the multiplexer shiftregister is disabled for the duration of the conversion.An interval of one clock period is automatically inserted to allow the selected multiplexed channel to settle. DOcomes out of the high-impedance state and provides a leading low for one clock period of multiplexer settlingtime. The SAR comparator compares successive outputs from the resistive ladder with the incoming analogsignal. The comparator output indicates whether the analog input is greater than or less than the resistive-ladderoutput. As the conversion proceeds, conversion data is simultaneously output from DO, with the most significantbit (MSB) first. After eight clock periods, the conversion is complete and SARS goes low.The TLV0834 outputs the least-significant-bit (LSB) first data after the MSB-first data stream. When SE is heldhigh on the TLV0838, the value of the LSB remains on the data line. When SE is forced low, the data is thenclocked out as LSB-first data. (To output LSB first, SE must first go low, then the data stored in the 9-bit shiftregister outputs LSB first.) When CS goes high, all internal registers are cleared. At this time, the output circuitsgo to the high-impedance state. If another conversion is desired, CS must make a high-to-low transition followedby address information.DI and DO can be tied together and controlled by a bidirectional processor I/O bit received on a single wire. Thisis possible because DI is only examined during the multiplexer-addressing interval and DO is still in thehigh-impedance state.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•3元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996 sequence of operationTLV08341CLK23456710111213141518192021tconvCStsuStartBitDIDIFSARSHi-ZEVEN1+SignSELECTBitBit 1SGLODDDon’t CareMUX Settling TimeMSB-First DataLSB-First DataHi-ZDOHi-ZMSB7621LSB0126MSB7TLV0834 MUX-ADDRESS CONTROL LOGIC TABLEMUX ADDRESSCHANNEL NUMBERCH0CH1CH2CH3ODD/EVENSELECT BIT 1SGL/DIF+–LLL+–LHL–+LLH–+LHH+HLL+HHL+HLH+HHHH = high level, L = low level, – or + = terminal polarity for the selected input channel4POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996sequence of operationTLV08381CLK23456781112131415161718192021222324252627tsuCSMUXAddressing+SignSELSELStartBitBitBit1BitSGLODD0DIDIFEVEN10tsutconvDon’t CareSARSHi-ZHi-ZSELSB-First DataHi-ZMSB7621LSB0123456MSB7MSB-First DataHi-ZDOSE Used to Control LSB-First DataSEMUX SettlingTimeMSB-First DataLSB HeldLSB-First DataDOMSB7621LSB0123456MSB7POST OFFICE BOX 655303 DALLAS, TEXAS 75265•5元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996 TLV0838 MUX-ADDRESS CONTROL LOGIC TABLEMUX ADDRESSSGL/DIFLLLLLLLLHHHHHHHHODD/EVENLLLLHHHHLLLLHHHHSELECT1LLHHLLHHLLHHLLHH0LHLHLHLHLHLHLHLH++++++++–+–+–+–+––––––––CH0+SELECTED CHANNEL NUMBER0CH1–+–+–+–CH21CH3CH42CH5CH63CH7COMH = high level, L = low level, – or + = polarity of external inputabsolute maximum ratings over recommended operating free-air temperature range (unlessotherwise noted)†Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 VInput voltage range: Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 VAnalog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC+ 0.3 VInput current, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mATotal input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mAOperating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°CI suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°CStorage temperature range, Tstg –65. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C to 150°CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . . . . . . . . . . . . . . 260°C†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTE 1:All voltage values, except differential voltages, are with respect to the network ground terminal.6POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996recommended operating conditionsMINSupply voltage, VCC (see clock frequency operating conditions)High-level input voltage, VIHLow-level input voltage, VILClock frequency, f(CLK)Clock frequency, f(CLK)Clock duty cycle (see Note 2)Pulse duration, CS high, twH(CS)Setup time, CS low, SE low, or data valid before CLK↑, tsuHold time, data valid after CLK↑, thOperatingfreeairtemperatureTAOperating free-air temperature, TC suffixI suffixVCC = 2.7 VVCC = 3.3 V2.720.8101040%220350900–40708525060060%nsnsns°CNOM3.3MAX3.6UNITVVVkHzkHzNOTE 2:The clock-duty-cycle range ensures proper operation at all clock frequencies. When a clock frequency is used outside therecommended duty-cycle range, the minimum pulse duration (high or low) is 1 µs.electrical characteristics over recommended range of operating free-air temperature, VCC = 3.3 V,f(CLK) = 250 kHz (unless otherwise noted)digital sectionPARAMETERVOHVOLIIHIILIOHIOLIOZCiHighleveloutputvoltageHigh-level output voltageLow-level output voltageHigh-level input currentLow-level input currentHigh-level output (source) currentLow-level output (sink) currentHigh-impedance-state outputgcurrent (DO or SARS)Input capacitanceTEST CONDITIONSTESTCONDITIONS†VCC = 3 V,VCC = 3 V,VCC = 3 V,VIH = 3.6 VIOH = –360 µAIOH = –10 µAIOL = 1.6 mA0.005–0.005–6.58–15160.01–0.013–3C SUFFIXMINTYP‡MAX2.82.90.341–1–6.580.005–0.005–15160.01–0.0153–3I SUFFIXMINTYP‡2.42.80.41–1MAXUNITVVµAµAmAmAµApFpFVIL = 0At VOH, DO = 0 V, TA = 25°CA t VOL, DO = VCC, TA = 25°CVO = 3.3 V,VO = 0,TA = 25°CTA = 25°CCoOutput capacitance5†All parameters are measured under open-loop conditions with zero common-mode input voltage (unless otherwise specified).‡All typical values are at VCC = 3.3 V, TA = 25°C.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•7元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996 analog and converter sectionPARAMETERVICCommon-mode input voltagegOn channelII(I(stdby)tdb)Standbyinputcurrent(seeNote4)Standby input current (see Note 4)Off channelOn channelOff channelri(REF)Input resistance to REFTEST CONDITIONS†See Note 3VI = 3.3 VVI = 0VI = 0VI = 3.3 V1.32.4MIN–0.05toVCC+0.051–1–115.9kΩµATYP‡MAXUNITVtotal devicePARAMETERMINTYP‡MAXUNITICCSupply current0.20.75mA†All parameters are measured under open-loop conditions with zero common-mode input voltage.‡All typical values are at VCC = 3.3 V, TA = 25°C.NOTES:3.When channel IN– is more positive than channel IN+, the digital output code is 0000 0000. Connected to each analog input aretwo on-chip diodes that conduct forward current for analog input voltages one diode drop above VCC. Care must be taken duringtesting at low VCC levels (3 V) because high-level analog input voltage (3.6 V) can, especially at high temperatures, cause the inputdiode to conduct and cause errors for analog inputs that are near full scale. As long as the analog voltage does not exceed the supplyvoltage by more than 50 mV, the output code is correct. To achieve an absolute 0- to 3.3-V input range requires a minimum VCC of3.25 V for all variations of temperature and load.4.Standby input currents go in or out of the on or off channels when the A/D converter is not performing conversion and the clock isin a high or low steady-state condition.operating characteristics, VCC = 3.3 V, f(CLK) = 250 kHz, tr = tf = 20 ns, TA = 25°C (unless otherwise noted)PARAMETERSupply-voltage variation errorTotal unadjusted error (see Note 5)Common-mode errortpddtdidistconvPropagation delay time, gy,output data after CLK↓ (see Note 6)MSB-first dataLSB-first dataTEST CONDITIONS§VCC = 3 V to 3.6 VVref = 3.3 V,TA = MIN to MAXDifferential modeCL = 100pF=100pFCL = 10 pF,CL = 100 pF,RL = 10 kΩRL = 2 kΩMINTYP±1/16±1/16MAX±1/4±1±1/4500200802508UNITLSBLSBLSBnsnsclockperiodsOutputdisabletimeDOorSARSafterCS↑Output disable time, DO or SARS after CSConversion time (multiplexer-addressing time not included)§All parameters are measured under open-loop conditions with zero common-mode input voltage. For conditions shown as MIN or MAX, use theappropriate value specified under recommended operating conditions.NOTES:5.Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.6.The MSB-first data is output directly from the comparator and, therefore, requires additional delay to allow for comparator responsetime.8POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996PARAMETER MEASUREMENT INFORMATIONVCCCLK50%tsuCS0.4 Vth2 V2 VDI0.4 V0.4 VGNDthVCCGND50%GNDtsuVCCFigure 1. Data-Input TimingVCCCLK50%tpdDO50%tpdVCC50%GNDtsu50%GNDVCC50%GNDSEFigure 2. Data-Output TimingPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•9元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996 PARAMETER MEASUREMENT INFORMATIONVCCTestPointFrom OutputUnder TestCL(see Note A)RLS1S2LOAD CIRCUITtrCS50%90%10%tdisDO and SARSS1 openS2 closed90%VCCCSGNDVCCDO and SARSGND50%tr90%10%tdisS1 closedS2 openVCC10%GNDVCCGNDVOLTAGE WAVEFORMSNOTE A: CL includes probe and jig capacitance.VOLTAGE WAVEFORMSFigure 3. Output Disable Time Test Circuit and Voltage Waveforms10POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996TYPICAL CHARACTERISTICSUNADJUSTED OFFSET ERRORvsREFERENCE VOLTAGE16EO(unadj)– Unadjusted Offset Error – LSBVI(+) = VI(–) = 0 V141.25EL– Linearity Error – LSB12108200.011.5LINEARITY ERRORvsREFERENCE VOLTAGEVCC = 3.3 Vf(CLK) = 250 kHzTA = 25°C1.00.750.50.250.1110001234Vref – Reference Voltage – VVref – Reference Voltage – VFigure 4LINEARITY ERRORvsFREE-AIR TEMPERATURE0.5Vref = 3.3 Vf(CLK) = 250 kHzEL– Linearity Error – LSB2.01.81.61.41.210.80.60.40.20.25–50–25025507510000100200Vref = 3.3 VVCC = 3.3 VFigure 5LINEARITY ERRORvsCLOCK FREQUENCY0.45EL– Linearity Error – LSB0.485°C0.3525°C0.3–40°C300400500600700800TA – Free-Air Tempertature – °Cf(CLK) – Clock Frequency – kHzFigure 6Figure 7POST OFFICE BOX 655303 DALLAS, TEXAS 75265•11元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996 TYPICAL CHARACTERISTICSTLV0831TLV0831SUPPLY CURRENTvsFREE-AIR TEMPERATURE0.3f(CLK) = 250 kHzCS = High0.4ICC– Supply Current – mA0.5SUPPLY CURRENTvsCLOCK FREQUENCYVCC = 3.3 VTA = 25°CVCC = 3.6 VICC– Supply Current – mAVCC = 3.3 V0.2VCC = 3 V0.30.20.10.1–50–25025507510000100200300400500TA – Free-Air Temperature — °Cf(CLK) – Clock Frequency – kHzFigure 8OUTPUT CURRENTvsFREE-AIR TEMPERATURE16.5VCC = 3.3 V16IO– Output Current – mAIOL (DO = 3.3 V)15.5–IOH (DO = 0 V)15–IOH (DO = 2.4 V)14.5IOL (DO = 0.4 V)14–50Figure 9–250255075100TA – Free-Air Temperature – °CFigure 1012POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comTLV0834C, TLV0834I, TLV0838C, TLV0838I 3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL SLAS147 – SEPTEMBER 1996TYPICAL CHARACTERISTICSDifferential Nonlinearity – LSB10.50Vref = 3.3 VTA = 25°CF(CLK) = 250 kHzVDD = 3.3 V03296128Output Code160192224256–0.5–1Figure 11. Differential Nonlinearity With Output Code1Integral Nonlinearity – LSBVref = 3.3 VTA = 25°CF(CLK) = 250 kHzVDD = 3.3 V0.50–0.5–103296128Output Code160192224256Figure 12. Integral Nonlinearity With Output Code1Total Unadjusted Error – LSBVref = 3.3 VTA = 25°CF(CLK) = 250 kHzVDD = 3.3 V0.50–0.5–103296128Output Code160192224256Figure 13. Total Unadjusted Error With Output CodePOST OFFICE BOX 655303 DALLAS, TEXAS 75265•13元器件交易网www.cecb2b.com
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