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APExx12 Series DATA SHEET
APLUS INTEGRATED CIRCUITS INC.
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段32號3樓之10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
Sales E-mail:
sales@aplusinc.com.tw
Technology E-mail: service@aplusinc.com.tw
元器件交易网www.cecb2b.comAPExx12 Series
1.0 General Description
The APExx12 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices. With CMOS technology and halt function can minimize power dissipation. Their architectures are similar to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles).
2.0 Features
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz. (2) Program ROM: 16k x 10 bits
(3) 1 set of 16-bits DPR can access up to k x 10 bits melody data memory space, and 1 set of 18-bits
VPR can access up to 256k x 10 bits voice data memory space.
Product
Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit)
APE0612 6 14-bits 20k APE1012 10 15-bits 32k APE1512 15 16-bits 48k APE2012 20 16-bits k APE3112 31 17-bits 96k APE4112 41 17-bits 128k APE5212 52 18-bits 160k APE6312 63 18-bits 192k APE7312 73 18-bits 224k APE8412 84 18-bits 256k (4) Data Registers:
a). 128 x 4-bit data RAM (00-7Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh (5) I/O Ports:
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control) b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option) c). PRD: 4-bits I/O Port D (15h) can be programmed to input/output individually. (Register control) (6) On-chip clock generator: Resistive Clock Drive (RM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter). (8) Stack: 2-level subroutine nesting.
(9) Built-in 4 Level Volume Control can be programmed.
1
Rev 1.3 2003/8/18
元器件交易网www.cecb2b.comAPExx12 Series
(10) Built-in 8 Level DAC current output can be configured. (Mask option)
(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option) (12) External Reset: Port B[3] can be configured as reset pin. (Mask opton) (13) HALT and Release from HALT function to reduce power consumption (14) Watch Dog Timer (WDT)
(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles (16) Number of instruction: 27
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).
FIGURE 1 : ROM Map of APExx12 Series
PC[13:0] 14-bit x 2 STACK 16-bit Data Pointer 18-bit Voice Pointer Reset Vector 00000h 000FEh 000FFh-00400h 00401h Reserved for Testing 00000h-03FFFh
00000h-0FFFFh Data ROM for Melody Program ROM 00000h-5FFFFh Voice ROM for Voice 2 Rev 1.3 2003/8/18
元器件交易网www.cecb2b.comAPExx12 Series
3.0 Pin Description
Pad Name
PWM2/Cout PWM1 Vdd1~2 PRA0~3 PRD0~3 PRB0, PRB2
Pin Attr.
O
Description
PWM2 output, or Current Output of Audio.
O PWM1 output. Power Power supply during operation. I/O
I/O port can be programmed to input/output individually.
Input type with weak pull-low or fix-input-floating capability. Buffer Output type.
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability. Buffer Output type.
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability. Buffer Output type.
Mask option selected as an IR Carrier Output with 38k / 56kHz
I/O port can be configured to input/output individually.
Input type with weak pull-low or fix-input-floating capability. Buffer Output type.
Mask option selected as an external RESET pin with weak pull-low capability.
RM mode Oscillator input Ground Potential I/O
PRB1 / IR I/O
PRB3 / Reset I/O
OSC GND1~3 I Power
4.0 DC Characteristics
Symbol
Vdd
Vdd Min. Typ. Max. Unit 2.4 3 5.5 V 3 1 Isb Standby uA
4.5 1 Supply
current 3 2 Operating mA Iop
4.5 7 3 3 Input current
Iih uA
(Internal pull low) 4.5 10 3 -3 Ioh Output-high current 4.5 -10 mA
3 7 Iol Output-low current 4.5 19 3 0.8 ~ 4.8 DAC output current
Cout mA
(8-level option) 4.5 0.9 ~ 6.5
Parameter Operating voltage
Condition
depending on Freq.
4MHz, RM, in HALT Mode
4MHz, RM, IO Floating Input ports with weak
pull-low
4MHz, RM (IO ports) 4MHz, RM (Full scale) Fosc(3v- 2.4v) Fosc (3v)
dF/F Frequency stability -5 5 % Vdd=3V, Rosc=180k, dF/F Fosc lot variation -10 10 % 4MHz
3 Rev 1.3 2003/8/18
元器件交易网www.cecb2b.comAPExx12 Series
FIGURE 2 : Frequency vs. Rosc (at 3V)
Resistor (Rosc ohms) Frequency (MHz)
110k
200k
300k
430k 3.92 14.84 8.25 5.54 Rosc vs Freq.20Freq. (MHz)151050010014.848.255.543.92400500200300Rosc (k ohm)
5.0 Application Circuit
4 Rev 1.3 2003/8/18
元器件交易网www.cecb2b.comAPExx12 Series
6.0 Bonding Diagram
2 Vdd2 1 PWM1 ROM YPRD3 PRD2 20 19
Pad # 1 2 3 4 5 6 7 8 9 10
Pad Name
(0,0)
4 GND2 GND3 PRA0 Pad Size : 80 um x 80 um * The IC substrate must be connected to GND. PRD1 18 PRD017 16 3 PWM2/Cout OSC GND1 15 PRA1 PRA2 PRA3 9 PRB0 10 PRB1 11 PRB2 12 PRB3 13 Vdd1 14 5 6 7 8 XPad # 11 PWM1 57 865 12 Vdd2 58 670 13 PWM2/ Cout 58 386 14 GND3 58 235 15 GND2 65 87 16 PRA0 175 87 17 PRA1 285 87 18 PRA2 395 87 19 PRA3 505 87 20 PRB0 615 87 X Y Pad Name X Y
PRB1 725 87 PRB2 835 87 PRB3 945 87 Vdd1 1055 87 GND1 1059 241 OSC 1059 351 PRD0 1059 461 PRD1 1059 571 PRD2 1059 681 PRD3 1059 791
Chip Size :
APE0612 : 1230 um x 1530 um, APE1012 : 1230 um x 1530 um APE1512 : 1230 um x 1758 um, APE2012 : 1230 um x 1758 um APE3112 : 1230 um x 2210 um, APE4112 : 1230 um x 2210 um APE5212 : 1230 um x 3116 um, APE6312 : 1230 um x 3116 um APE7312 : 1230 um x 3116 um, APE8412 : 1230 um x 3116 um
5
Rev 1.3 2003/8/18
