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专利名称：CMOS INTEGRATED CIRCUIT发明人：KIMURA MASAHARU申请号：JP1585291申请日：19910116公开号：JPH04242319A公开日：19920831
摘要：PURPOSE:To prevent any hindrance from being given onto signal input/outputto/from a peripheral circuit at the outside of a chip regardless of reducing powerconsumption through a decreased power supply voltage with respect to the CMOSintegrated circuit, especially its power consumption reduction. CONSTITUTION:High andlow potential power terminals of the same polarity are provided in a integrated circuit,the power line of an external circuit 20 is connected to the high potential power terminalVCC2 and the power line of an internal circuit 10 is connected to the low potential powerterminal VCC1, and a level conversion circuit 30 converting the output level of the internalcircuit into an input level of the external circuit is disposed between the internal circuitand the external circuit. Then the power consumption of the internal circuit is reduced tomake matching with the peripheral circuit.
申请人：FUJITSU LTD
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