专利内容由知识产权出版社提供
专利名称：LOW CLOCKING POWER FLIP-FLOP发明人：Xi Zhang,Hwong-Kwo Lin,Ge Yang,Lingfei
Deng
申请号：US144637申请日：20150311
公开号：US20160269002A1公开日：20160915
专利附图：
摘要：Low clocking power flip-flop. In accordance with a first embodiment of thepresent invention, a flip-flop electronic circuit includes a master latch coupled to a slavelatch in a flip-flop configuration. The flip-flop electronic circuit also includes a clock
control circuit for comparing an input to the master latch with an output of the slavelatch, and responsive to the comparing, blocking a clock signal to the master latch andthe slave latch when the flip-flop electronic circuit is in a quiescent condition.
申请人：NVIDIA Corporation
地址：Santa Clara CA US
国籍：US
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