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专利名称：METHOD AND STRUCTURE FOR LOW-K
FACE-TO-FACE BONDED WAFER DICING
发明人：Luke ENGLAND,Ramakanth ALAPATI申请号：US14833209申请日：20150824
公开号：US20170062399A1公开日：20170302
专利附图：
摘要：Methods for removing low-k dielectric material from dicing lanes in a bondedpair of IC wafers and the resulting device are disclosed. Embodiments include providinglow-k dielectric and standard dielectric layers on upper surfaces of top and bottom IC
substrates, each including an array of adjacent IC die areas separated by dicing lanes;removing from the dicing lanes the standard and low-k dielectric layers to form cavitiesexposing sections of the upper surfaces of IC substrates; depositing a standard dielectricmaterial in the cavities and on upper surfaces of the standard dielectric layer of the topand bottom IC substrates; planarizing upper surfaces of the standard dielectric materialof the IC substrates; forming a face-to-face bonding of the IC substrates, wherein thedicing lanes in the IC substrates are vertically aligned; and dicing adjacent bonded IC dieareas through vertically aligned dicing lanes in the IC substrates.
申请人：GLOBALFOUNDRIES Inc.
地址：Grand Cayman KY
国籍：KY
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