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Microarchitecture prediction of execution clusters

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专利名称:Microarchitecture prediction of execution

clusters and inter-cluster communications

发明人:Avinash Sodani,Alexandre J. Farcy,Stephan J.

Jourdan,Per Hammarlund,Mark C. Davis

申请号:US11323043申请日:20051230

公开号:US20070157008A1公开日:20070705

专利附图:

摘要:Microarchitecture policies and structures to predict execution clusters andfacilitate inter-cluster communication are disclosed. In disclosed embodiments,

sequentially ordered instructions are decoded into micro-operations. Execution of oneset of micro-operations is predicted to involve execution resources to perform memoryaccess operations and inter-cluster communication, but not to perform branchingoperations. Execution of a second set of micro-operations is predicted to involve

execution resources to perform branching operations but not to perform memory accessoperations. The micro-operations are partitioned for execution in accordance with thesepredictions, the first set of micro-operations to a first cluster of execution resources andthe second set of micro-operations to a second cluster of execution resources. The firstand second sets of micro-operations are executed out of sequential order and areretired to represent their sequential instruction ordering.

申请人:Avinash Sodani,Alexandre J. Farcy,Stephan J. Jourdan,Per Hammarlund,Mark C.Davis

地址:Portland OR US,Hillsboro OR US,Portland OR US,Hillsboro OR US,Portland ORUS

国籍:US,US,US,US,US

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