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专利名称：Semiconductor chip including integrated
circuit including at least five gate levelconductive structures having particularspatial and electrical relationship andmethod for manufacturing the same
发明人：Scott T. Becker,Michael C. Smayling申请号：US14946292申请日：20151119公开号：US09425273B2公开日：20160823
专利附图：
摘要：A semiconductor chip region includes a first conductive structure (CS) thatforms a gate electrode (GE) of a first transistor of a first transistor type (TT) and a GE of afirst transistor of a second TT, a second CS that forms a GE of a second transistor of thefirst TT, a third CS that forms a GE of a second transistor of the second TT, a fourth CSthat forms a GE of a third transistor of the first TT, and a fifth CS that forms a GE of athird transistor of the second TT. Diffusion terminals of the first and second transistorsof the first TT are electrically connected. Diffusion terminals of the first and secondtransistors of the second TT are electrically connected. Diffusion terminals of the secondand third transistors of both the first TT and second TT are electrically connected.
申请人：Tela Innovations, Inc.
地址：Los Gatos CA US
国籍：US
代理机构：Marine Penilla Group, LLP
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