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专利名称：METHOD OF FORMING METAL
INTERCONNECT FOR SEMICONDUCTORDEVICE BASED ON SELECTIVE DAMASCENEPROCESS
发明人：Tae-Hoon CHOI,Hyung Suk Lee,Sung-Il
Chang,Jun-Bo Yoon
申请号：US11382175申请日：20060508
公开号：US20060258144A1公开日：20061116
专利附图：
摘要：Provided is a method for forming metal interconnect only in desired regions ofa semiconductor device based on selective damascene using an insulation materialagainst plating to form the metal interconnect without a Chemical Mechanical Polishing(CMP) or an additional lithography process. The selective damascene is stable andeffective in the respect of cost and simplifies the semiconductor interconnect formingprocess.
申请人：Tae-Hoon CHOI,Hyung Suk Lee,Sung-Il Chang,Jun-Bo Yoon
地址：Daejeon KR,Daejeon KR,Deajeon KR,Daejeon KR
国籍：KR,KR,KR,KR
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