专利内容由知识产权出版社提供
专利名称：Multiplication unit and method for the
operation thereof
发明人：Alois Rainer申请号：US06/628585申请日：19840706公开号：US04679165A公开日：19870707
摘要：A multiplication unit for n-place binary numbers has a first register containingthe multiplicand, and accumulator, and an arithmetic unit having operand inputs
connected to the first register and to the accumulator. The operation to be undertakenby the arithmetic unit is to find by the bits of a multiplier which is contained in a secondregister, the second register being connected to an operation instruction input of thearithmetic unit. A multiplexer having inputs connected to the outputs of the secondregister through-connects the bits of five adjacent multiplier places to the inputs of alogic circuit, which derives the operation instruction for the arithmetic unit. The logiccircuit also supplies an instruction to a mulitple shift unit interconnected between theoutput of the arithmetic unit and the input of the accumulator.
申请人：SIEMENS AKTIENGESELLSCHAFT
代理机构：Hill, Van Santen, Steadman & Simpson
更多信息请下载全文后查看
