A5943三相无感正弦波控制 内置MOSFET

Features and Benefits

• Full 3-phase sinusoidal drive• PWM speed input • Analog speed input • FG speed output • Lock detection • Current limiting

• Output short circuit protection

Description

The A5943 is a low noise, three phase motor driver with integrated power bridge suitable for driving small fans and blowers. Motor audible noise and vibration is reduced by driving the phases with sinusoidal PWM excitation. Motor current is controlled using PWM techniques to minimize the power dissipation.

Rotor position is determined by Hall effect elements. These provide direct inputs to the integrated commutation and excitation logic.

In addition to speed control by varying the supply voltage, motor speed can be controlled using a variable duty cycle PWM input or a variable voltage analog input. This allows system cost savings by eliminating the requirement for an external variable power supply. Motor speed is indicated each full commutation cycle by a single digital output.

The A5943 incorporates motor lock detection, current limiting, supply overvoltage and undervoltage detection, short circuit protection, and overtemperature protection.

The A5943 is supplied in a 16-pin TSSOP power package with an exposed thermal pad (package type LP). This package is lead (Pb) free with 100% matte-tin lead frame plating.

Applications:

• Air blower

• Air conditioning• Air movement

Package: 16-pin TSSOP with Exposed Thermal Pad (suffix LP)

Not to scale

Typical Application Diagram

Automotive12 V Power NetVBBA5943 OUTASpeed DemandSpeed OutputSPDOUTBOUTCVREFHAPHAMHBPHBMHCPHCMGNDFGSELPHAMA5943-DSWAS “A”Allegro MicroSystems, LLC Confidential Information

A5943Three Phase Sinusoidal Fan Driver

Selection Guide

Part Number

A5943GLPTR-T

Packing

1500 pieces per reel

Package

4.4 mm x 5 mm, 1.2 mm nominal height16-pin TSSOP with exposed thermal pad

Absolute Maximum Ratings with respect to GND

Characteristic

Drive Supply VoltagePins SPD, SELPin FG

Pins HAP, HAM, HBP, HBM, HCP, HCMPin VREF

Ambient Operating Temperature Range

Maximum Continuous Junction Temperature

Storage Temperature Range

SymbolVBB––––TATJ(max)Tstg

Temperature Range G, limited by power dissipation

Notes

Rating–0.3 to 50–0.3 to 6–0.3 to 6–0.3 to 6–0.3 to 6–40 to 105

150–55 to 150

UnitVVVVV°C°C°C

Thermal Characteristics may require derating at maximum conditions, see application information

Characteristic

Package Thermal Resistance

Symbol

RθJA

Test Conditions*

On 4-layer PCB based on JEDEC standard

On 2-layer PCB with 3.8 in.2 of copper area each side

Value

3443

Unit

ºC/WºC/W

*Additional thermal information available on the Allegro website.

Table of Contents

Functional Block Diagram Pin-out Diagram and Terminal List Electrical Characteristics Table Commutation Timing Diagram Commutation and Phase Tables Functional Description

Pin Functions Operation

345799

Speed Control

Operation During Start

Transition to Sinusoidal Operating Mode Soft Start Lock Detect Current Limit

Output Short Circuit Protection 101011111212121314

Application Information Package Outline Drawing

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A5943Three Phase Sinusoidal Fan Driver

Functional Block Diagram

SEL

ADCSelectSPD

Duty Ratio Detector Filter Start SequenceVBB10 μF OUTAGateDriveOUTBOUTCHall PHA3-Phase Sine Drive PWMGenerator MHall HallGND30 kHzPWM Oscillator VBBRegulator VREF220 nF HAPHAMFG Commutation Logic HBPHBMHCPHCMPADAllegro MicroSystems, LLC115 Northeast Cutoff

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A5943Three Phase Sinusoidal Fan Driver

Pin-out Diagram

HAP1HAM2HBP3HBM4HCP5HCM6PHA7VREF8PAD16SPD15SEL14FG13OUTA12GND11OUTB10OUTC9VBB

Terminal List Table

Number

123456710111213141516–

NameHAPHAMHBPHBMHCPHCMPHAVREFVBBOUTCOUTBGNDOUTAFGSELSPDPAD

Function

Hall element A inputHall element A inputHall element B inputHall element B inputHall element C InputHall element C inputPhase advance inputAnalog reference voltageSupply voltageMotor phase C outputMotor phase B outputGround

Motor phase A outputSpeed output

Speed control mode inputSpeed demand input

Exposed thermal pad, connect to GND

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A5943Three Phase Sinusoidal Fan Driver

ELECTRICAL CHARACTERISTICS Valid at TA = 25°C, VBB = 6.5 to 28 V; unless otherwise specified

Characteristic

Supplies

Supply Voltage Range1Supply Quiescent CurrentReference Output VoltageReference Dropout VoltageReference Current LimitMotor Bridge Output

Total On-Resistance (High-Side Plus Low-Side)

Output Sense Current2Current ControlDead Time

Motor PWM FrequencyCurrent Limit ThresholdOvercurrent Off-TimeMotor ControlStart TimeDisable TimeCommutation Period3

Drive Mode Selection PeriodSPD Maximum Demand (100%)SPD On Threshold (25%)SPD Off Threshold (12.5%)Duty Cycle On Threshold for SPDDuty Cycle Off Threshold for SPDInternal Speed Demand Slew RateLogic Input and OutputInput Low Voltage (SEL, SPD)Input High Voltage (SEL, SPD)Input Hysteresis (SEL, SPD)Input Low Voltage (PHA)Input High Voltage (PHA)

Input Open Voltage Condition (PHA)

VILVIHVIhysVIL(PHA)VIH (PHA)VIOpen

–2.0100–8045

––300––50

0.8––20–55

VVmV%VREF%VREF%VREF

tSTtLDtCOMMtSINOKVSPDMAXVSPDONVSPDOFF

DONDOFF

Sinusoidal mode selected when tCOMM < tSINOKSEL = 0; VBB ≥ 6.5 V and monotonic from 0 V to VSPDMAXSEL = 0SEL = 0SEL = 1SEL = 1

––100334.151.0248023.7511.88

18–524.251.125802512.515.33

–––584.351.2268026.2513.12–

ssμsmsVVmV%%ms/%FS

tDEADfPWMICLtOFF

Per phase

–27.61.8–

400302.124

–32.42.5–

nskHzAμs

RDS(on)ISENSE

VBB = 12 VVBB = 7.0 V

VOUT = 0 V, outputs not driving

–––

0.540.85–175

0.651–

ΩΩμA

VBBIBBQVREFVREFDOIREFLIM

0 mA > IREF > –30 mAVBB = 4.8 V, IREF = –20 mAFunctional, no unsafe statesOutputs Driving

04.8–4.75––

–––550050

50VBBOV125.25––

VVmAVmVmA

Symbol

Test Conditions

Min.

Typ.

Max.

Unit

tRR –Continued on the next page…

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A5943Three Phase Sinusoidal Fan Driver

ELECTRICAL CHARACTERISTICS (continued) Valid at TA = 25°C, VBB = 6.5 to 28 V; unless otherwise specified

Characteristic

Logic Input and Output (continued)Input Pull-Down ResistorOutput Low Voltage (FG)Output Leakage2 (FG)Hall Element Input

Hall Differential Input Drive VoltageHall Input Common Mode RangeHall Input Offset VoltageHall Input Hysteresis VoltageDiagnostics And ProtectionVBB Overvoltage ThresholdVBB Overvoltage HysteresisVBB Undervoltage ThresholdVBB Undervoltage HysteresisVREF Undervoltage ThresholdVREF Undervoltage HysteresisShort Circuit Current Protection Thresholds4

Overtemperature Shut DownOvertemperature Hysteresis

VBBOVVBBOVHysVBBUVVBBHysVREFUVVREFHysVDSTJFTJhys

Temperature increasingRecovery = TJF – TJhysVREF risingVREF fallingVBB risingVBB fallingVBB risingVBB falling

3228–3.63.35–3.53.25–1.6155–

––3.5–3.55300–3.45300–17015

3631–4.13.7–4.03.6–5.5––

VVVVVmVVVmVVºCºC

VHDVHICMRVHOVHDHys

±301––

––±5±13

–4––

mVpk-pk

VmVmV

RPDVOLIO

SEL pinPHA, SPD pinsIOL = 2 mA0 V < VO < 5 V

––––1

50100––

––0.41

kΩkΩVμA

Symbol

Test Conditions

Min.

Typ.

Max.

Unit

1The term “functional” indicates correct operation but parameters may not be within specification above or below the general limits

(6.5 V < VBB < 28 V), and outputs are not operational above VBBOV or below VBBUV .

2For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.

3Parameter t

/ (6 × FG pin frequency) under steady motor speed conditions.COMM = 1

4Parameter V = V.DSOUTx to GND or VBB – VOUTx

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A5943Three Phase Sinusoidal Fan Driver

tCOMM Hall InputStatesHA HB HC OUTAPhase PWMOUTBDuty Cycle OUTC High ImpedanceHigh ImpedanceHigh ImpedanceIA Phase Current IB IC 0 60 120 180 240 300 360 Phase (electrical degrees)Figure 1. Commutation sequence timing

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A5943Three Phase Sinusoidal Fan Driver

Table 1. Commutation State Table

Commutation Input State*HA

HHHLLLHL

Output Mode

Trapezoidal ModeOUTA

HighHighZLowLowZZZ

Sinusoidal ModeOUTA

Sine PWMSine PWMSine PWMLowLowSine PWM

ZZ

HB

LLHHHLHL

HC

HLLLHHHL

OUTB

LowZHighHighZLowZZ

OUTC

ZLowLowZHighHighZZ

OUTB

LowSine PWMSine PWMSine PWMSine PWMLowZZ

OUTC

Sine PWMLowLowSine PWMSine PWMSine PWM

ZZ

Note: Z = high impedance

*H = VHxP > VHxM, L = VHxM > VHxP

Table 2. Phase Advance Table

PHA Input State

FG Output

(Hz)

080100120140160180250300>300

Low

(Electrical degrees)

0000000000

High

(Electrical degrees)

03.87.59.411.313.113.113.113.113.1

Open

(Electrical degrees)

5.65.65.65.65.65.65.65.65.65.6

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A5943Three Phase Sinusoidal Fan Driver

Functional Description

The A5943 is a three phase motor driver with integrated power half bridges suitable for driving small fans and blowers. Typically average continuous motor phase current up to 1.6 A is possible in an ambient temperature of 55°C, depending on the thermal resistance of the assembly. Peak phase current up to 2.1 A (typ) is controlled by fixed off-time PWM current limiting.

Motor audible noise and vibration is reduced by driving the phases with three 120 degree spaced sinusoidal currents. The motor current is determined by variable duty cycle PWM switch-ing of the three motor phase connections. The PWM duty cycle is generated automatically, depending on the rotor position and the demanded speed.

Rotor position is determined by Hall effect elements. These provide direct inputs to the integrated commutation and excita-tion logic.

In addition to speed control by varying the supply voltage, motor speed can be controlled using digital PWM or analog voltage inputs, allowing system cost savings by eliminating an external variable power supply. Motor speed is indicated each full electri-cal commutation cycle by a single digital output.

The A5943 incorporates motor lock detection, current limiting, supply overvoltage and undervoltage detection, overcurrent pro-tection, and overtemperature protection.

Pin Functions

VBB Main motor supply and chip supply for internal regulators and charge pump. VBB should be decoupled to ground with a low ESR electrolytic capacitor greater than 10 μF, and a 100 nF (50 V) X7R ceramic capacitor in parallel.

VREF Regulated 5 V output for Hall element supply up to

HBP, HBM Hall element B inputs. Hall input B (HB) is defined as

high when the voltage at HBP is greater than the voltage at HBM. Low is when HBM voltage is greater than HBP.

HCP, HCM Hall element C inputs. Hall input C (HC) is defined as

high when the voltage at HCP is greater than the voltage at HCM. Low is when HCM voltage is greater than HCP.

OUTA, OUTB, OUTC Motor phase connections.

FG Speed output indicator provides a logical output equivalent of

the Hall A (HA) status, one period per electrical revolution of the motor.

SEL Selects analog (voltage) or digital (PWM duty cycle) input

for the SPD pin.

SPD Speed demand input. Analog voltage input or digital PWM

duty cycle input selected by the SEL input.

PHA Phase advance input. When high, or open, phase advance is

enabled. When low, phase advance is disabled.

Operation

The three sinusoidal phase currents in the motor phase windings are generated, using variable duty cycle PWM, by a three-phase MOSFET power bridge. A three phase sine drive PWM generator provides the controlling inputs to the power bridge based on rotor position derived from Hall element inputs and a speed demand input. The PWM duty cycle modulation relative to the Hall sig-nals is shown in figure 1.

The first three waveforms, HA, HB, and HC, in figure 1 show the Hall sequence derived from 120° (electrical) spaced Hall elements. The A5943 incorporates sensitive comparators with a large common mode capability, allowing the Hall elements to be connected in series or in parallel. The Hall inputs provide the commutation points to the sine drive generator. This produces the continuously varying duty cycle for each phase, based on the timing between the commutation points as shown in waveforms OUTA, OUTB, and OUTC in figure 1. Note that figure 1 shows the internal duty cycle value applied to the PWM generator in each phase, not the voltage waveform at the phase output.The three sine wave phase currents, IA , IB , and IC, resulting from the three phase PWM outputs are shown in the bottom three waveforms in figure 1.

30 mA. Also used for internal logic and analog supply. Should be decoupled to ground with a 220 nF (10 V minimum) X7R ceramic capacitor.

GND Supply return and analog reference ground.

HAP, HAM Hall element A inputs. Hall input A (HA) is defined

as high when the voltage at HAP is greater than the voltage at HAM. Low is when HAM voltage is greater than HAP.

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A5943Three Phase Sinusoidal Fan Driver

Speed Control

The speed demand input modulates the range of the three PWM duty cycles to directly control the effective average voltage applied to the motor windings and therefore the current in the motor windings. The speed demand applied to the internal PWM generator is a digital value derived from the speed demand input pin, SPD. This input can be a variable duty cycle with frequency in range from 5 kHz to 100 kHz, or a linear voltage input depend-ing on the state of the SEL input.

When SEL is low, a voltage can be applied to the SPD input. This voltage is converted to a digital value by an internal 9-bit A-to-D converter, and then is used as the internal speed demand value. The input voltage range is from 0 V to typically 4.25 V. However when the input is less than 0.5 V, the motor speed demand will be zero. Between 1 and 4.3 V, the motor speed demand increases linearly from 25% to 100%. The relationship between the voltage on SPD, VSPD , and the motor speed demand is shown in figure 2. The 0.5 V of hysteresis related to the start and stop response of the motor can also be seen in figure 2.

When SEL is high, a variable duty cycle digital signal can be applied to the SPD input. This signal should be at a frequency of

typically 20 kHz. The signal timing is used to convert the input duty cycle to a 9-bit digital value, which is used as the motor speed demand value. The input duty cycle range is 0% to 100%. However, when the input duty cycle is less than 12.5%, the motor speed demand will be zero. Between 25% and 100% the motor speed demand increases linearly from 25% to 100%.

The relationship between the duty cycle of the PWM signal on the SPD pin, DCSPD, and the motor speed demand is shown in figure 2. The 12.5% of hysteresis related to the start and stop response of the motor is also be shown in figure 2.

Operation During Start

Note: Parameters used in the following descriptions are listed in the Motor Control section of the Electrical Characteristics table.As the motor turns, it produces commutation codes that gener-ate a speed related signal, tCOMM , which is used by the internal controller of the A5943 to detect two conditions: • Locked rotor

• The transition from trapezoidal drive mode to sinusoidal drive mode

The relationship between tCOMM and the rotational speed of a motor measured at the FG pin is shown in figure 3. The curve is based on electrical cycles of the motor commutation system and

100Motor Speed Demand (%) 75100.050Commutation Period, tCOMM (ms) tSINOK10.0251.00 (Disabled)0 0 12.5 25 0.5 1 50 75 100 PWM,DSPD (%)2.1 3.2 4.3 Analog,VSPD (V) 0.10 50010001500FG Pin Frequency (Hz) Control InputFigure 2. Control input mapping to speed demand

Figure 3. Relationship between tCOMM and FG frequency

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A5943Three Phase Sinusoidal Fan Driver

this relationship will remain constant irrespective of the number of pole pairs the motor has. The number of poles will modify the relationship between the frequency measured on the FG pin and the actual mechanical rotational speed, in rpm, of the motor.Figure 4 illustrates the conditions during a full start time period, tST , if the motor rotor is locked while driving a very high friction or inertia mechanical load. All these conditions will prevent the value of tCOMM reducing to a value less than the tSINOK period before tST times out. After tST has timed out, the drive to the motor will be turned off for approximately 8 s, the tLD period.It can be seen in figure 4 that a start condition is commanded immediately when the control setting on the SPD pin exceeds the 25% level. If the initial condition on the SPD pin is less than 25% there will be a time delay, based on initial conditions, before a start is commanded (discussed in the Soft Start section).During the start condition, trapezoidal drive mode is selected, also speed demand and motor current are controlled internally by the A5943. To aid starting the motor, current is incremented in steps every 50 ms in an attempt to increase the torque in the

motor and increase rotational speed, thereby reducing the value of tCOMM .

Transition to Sinusoidal Operating Mode

Figure 5 shows a successful transition to sinusoidal mode. Here the starting condition is the same as in figure 4, but now the motor reaches a higher speed during the tST period and the value of tCOMM reduces to values less than the tSINOK threshold . This results in sinusoidal drive mode being selected at the next com-mutation point.

After sinusoidal drive mode is commanded, the internal current limit is raised to ICL and the internal speed demand is lowered to 25%. Then controlled by the soft start feature in the A5943, the speed demand will increase during the period tSS , to the external speed demand setting set on the SPD pin.

Soft Start

A soft start function is integrated into the A5943. This is achieved by limiting the internal speed response slew rate to a maximum value, tRR , to slow the rate of change of PWM duty cycle deliv-ered to the motor phases.

Trapezoidal Drive100Internal SpeedResponse (%)Speed (%)tSTtLD100Trapezoidal DriveSinusoidal DrivetSTtSS250External speed demand, SPDInternal speed responseTime 250External speed demand, SPDInternal speed responseTime Active CurrentLimitActive CurrentLimitICLICL15 steps, 50 ms each15 steps, 50 ms each0Time 0Time Commutation Period,tCOMM tSINOK0 Time Commutation Period,tCOMM tSINOK0 Time Figure 4. Locked rotor case; no transition to sinusoidal modeFigure 5. Successful start and transition to sinusoidal mode

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A5943Three Phase Sinusoidal Fan Driver

This results in limiting the acceleration or deceleration of the motor between two speed demand levels input on the SPD pin. The end effect is to lower the average current demand from the power supply.

The speed change time, tSS, is defined by:

|tSS| = (SPD1 – SPD2) × tRR ,

where SPDn is the setting on the SPD pin, in % of full scale. This is the time it takes the internally generated PWM duty cycle to change between demand settings, SPD1 and SPD2, input on the SPD pin.

Applying the above equation, the maximum value of tSS in sinu-soidal mode would be when SPD1 = 12.5% and SPD2 = 100%:

tSS = 87.5 (%) × 15.33 (ms) = 1.345 s ,

and the maximum time to a motor start command would be when SPD1 = 0% and SPD2 = 25%:

tSS = 25 (%) × 15.33 (ms) = 383 ms .

The exception is when the signal on SPD is rapidly reduced to zero. This will cause all three drivers to enter the high impedance condition shown in table 1 immediately. This action is not modi-fied by the state on the SEL pin. The end result is all three half bridges turn off and the motor will coast to a halt.

Lock Detect

Rotor lock is a functional state where the motor is turning too slowly to change from trapezoidal to sinusoidal mode. It can occur during two conditions. The first is during initial motor start up and the second is when the motor is running in sinusoidal mode and is forced to slow down by an external force.

Motor speed is continuously sensed by measuring the time

between consecutive motor commutation points, and the value is stored as the parameter tCOMM. The relationship between tCOMM and the frequency available in the FG pin is shown in figure 3.At the end of the start-up time, tST , if the value of tCOMM is greater than the drive mode selection parameter, tSINOK , all phases will be disabled for a disable period, tLD. An attempt to restart the motor is made when tLD times out. The typical values of tST and tLD are 1 s and 8 s respectively. Restart attempts based on these times will continue while the speed demand setting on the SPD pin is greater than 12.5%.

If the motor is running in sinusoidal mode when an external force

causes it to slow down to a speed where tCOMM is greater than tSI-NOK, the A5943 will initiate a full start up sequence as shown in figure 4. If the force slowing the motor is no longer present, the motor will successfully re-start and switch to sinuisoidal mode as shown in figure 5. If the force is still present, then the start sequence described in figure 4 will result.

Current Limit

Load current on each active output is continuously monitored on the high-side sourcing MOSFET in each half bridge. If the cur-rent exceeds ICL, the source driver is turned off for 24 μs. During this fixed off time, the driver operates in slow decay, synchronous rectification, mode.

During start up in trapezoidal mode, the value of ICL is ramped from zero to aid starting and protect the outputs when the motor is locked. In sinusoidal mode the value of ICL is fixed. See figures 4 and 5 for more information.

Output Short Circuit Protection

The output short circuit protection feature operates to protect the A5943 if the current through any OUTx pin causes the source to drain voltage, VDS, across active MOSFETs to exceed safe values. This could be the result of a short to ground, STG, a short to battery, STB, or a shorted load, STL, condition being detected. If any of these conditions occur, the A5943 disables the drives to all three OUTx pins and coasts the motor.

To reset the driver and attempt to restart the motor, the speed demand setting on the SPD pin must be reduced to a value less than 12.5%, and then increased to greater than 25% to initiate an attempt to start the motor. If the STx condition is still present the coast condition will be commanded again.

Phase Advance

To improve motor efficiency, the A5943 includes a dynamic phase advance feature. The advance is based on electrical cycle degrees and is enabled by setting PHA input to high or to open (table 2).

As speed increases, the phase excitation sequence advances ahead of the commutation sequence (shown in figure 1) by the values at each speed threshold in table 2. Rapid switching between advance values due to speed jitter is prevented by a hysteresis of about 10 Hz. When PHA is low, no phase advance is introduced.

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Application Information

12 V Power NetVBBA5943 OUTAFigure 6. Digital PWM speed control

0 % to 100% Duty Cycleat 20 kHz

Speed OutputVREFSPDOUTBOUTCVREFHAPHAMHBPHBMHCPHCMGNDFGSELPHAM12 V Power NetVBBA5943 OUTA0 to 4.3 VSPDOUTBOUTCVREFHAPHAMHBPHBMHCPHCMGNDFigure 7. Analog voltage speed control

Speed OutputFGSELPHAM12 V Power NetVBBA5943 OUTAVREFSPDOUTBOUTCVREFHAPHAMHBPHBMHCPHCMGNDFigure 8. VBB voltage mode speed control

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Allegro MicroSystems, LLC Confidential InformationA5943Three Phase Sinusoidal Fan DriverPackage LP, 16-Pin TSSOPWith Exposed Thermal Pad

0.455.00±0.10168º0º0.200.091.70160.65B3 NOMA4.40±0.106.40±0.200.60 ±0.151.00 REF3.006.10123 NOMBranded Face0.25 BSCCSEATING PLANEGAUGE PLANE123.00CPCB Layout Reference View

16X0.10C0.300.19SEATINGPLANE1.20 MAX0.150.000.65 BSCFor Reference Only; not for tooling use (reference MO-153 ABT)Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shownATerminal #1 mark areaBExposed thermal pad (bottom surface); dimensions may vary with deviceCReference land pattern layout (reference IPC7351

SOP65P0X110-17M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)

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Copyright ©2013, Allegro MicroSystems, LLC

Allegro MicroSystems, LLC reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.

Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm.The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, LLC assumes no re spon si bil ity for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use.

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