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HM50N06K

来源:九壹网
 N-Channel Enhancement Mode Power MOSFET

DESCRIPTION

The HM50N06K uses advanced trench technology and design to provide excellent RDS(ON) with low gate charge. It can be used in a wide variety of applications.

HM50N06K

GENERAL FEATURES

● VDS =60V,ID =50A

RDS(ON) <20mΩ @ VGS=10V

● High density cell design for ultra low Rdson ● Fully characterized Avalanche voltage and current ● Good stability and uniformity with high EAS ● Excellent package for good heat dissipation ● Special process technology for high ESD capability

Schematic diagram

H&M SEMI

HM50N06K

Application

● Power switching application

● Hard Switched and High Frequency Circuits ● Uninterruptible Power Supply

Marking and pin Assignment

100% UIS TESTED!

100% ΔVds TESTED!

TO-252-2L top view

Package Marking And Ordering Information

Device Marking

Device

Device Package

Reel Size

-

Tape width

-

Quantity

-

HM50N06K HM50N06K TO-252-2L

Absolute Maximum Ratings (TC=25℃unless otherwise noted)

Parameter Symbol Limit Unit Drain-Source Voltage 60 V VDS Gate-Source Voltage ±20 V VGS

Drain Current-Continuous

ID IDM PD

TJ,TSTG

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50 A Drain Current-Continuous(TC=100℃) ID (100℃) 35 A Pulsed Drain Current Maximum Power Dissipation Derating factor

Single pulse avalanche energy (Note 5)

Operating Junction and Storage Temperature Range

220 A 80 W 0.53 W/℃

EAS 115 mJ -55 To 175

Thermal Characteristic

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Thermal Resistance,Junction-to-Case(Note 2)

RθJC

HM50N06K1.88

℃/W

Electrical Characteristics (TC=25℃unless otherwise noted)

Parameter SymbolCondition

Off Characteristics

Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage Current On Characteristics (Note 3) Gate Threshold Voltage

Drain-Source On-State Resistance Forward Transconductance Dynamic Characteristics (Note4) Input Capacitance Output Capacitance

Reverse Transfer Capacitance Switching Characteristics (Note 4) Turn-on Delay Time Turn-on Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge

Drain-Source Diode Characteristics Diode Forward Voltage (Note 3) Diode Forward Current (Note 2)

Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time

Min Typ Max Unit

BVDSS IDSS IGSS VGS(th) RDS(ON) gFS

VGS=0V ID=250μA 60 70 - V VDS=60V,VGS0V - - 1 μA

VGS=±20V,VDS0V - - ±100 nA VDS=VGS,ID=250μA 1.5 - 3.0 V =VGS=10V, ID20A - 17 20 mΩ VDS=25V,ID20A 24 - - S Clss - 1200 - PF VDS=25V,VGS=0V,

Coss - 104 - PF F=1.0MHz

- 33 - PF Crss

td(on) - 25 - nS VDD=30V,ID=2A,RL=15Ω tr - 5 - nS =VGS=10V,Rtd(off) - 50 - nS G=2.5Ω

=

tf - 6 - nS Qg - 30 nC VDS=30V,I=50A, D=

Qgs - 10 nC =V=10V GSQgd - 5 nC VSD

VGS=0V,IS40A - 1.2 V IS - - 50 A Qrr ton

di/dt = 100A/μs(Note3)

- 100 - nC 50 - nS trr - TJ = 25°C, IF = 40A

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:

1. Repetitive Rating: Pulse width limited by maximum junction temperature. 2. Surface Mounted on FR4 Board, t ≤ 10 sec. 3. Pulse Test: Pulse Width ≤ 300μs, Duty Cycle ≤ 2%. 4. Guaranteed by design, not subject to production

5. EAS condition:Tj=25℃,VDD=30V,VG=10V,L=0.5mH,Rg=25Ω

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HM50N06K

Test circuit

1)EAS test Circuits

2)Gate charge test Circuit:

3)Switch Time Test Circuit:

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS (Curves)

Normalized On-Resistance HM50N06K

ID- Drain Current (A)

Vds Drain-Source Voltage (V)

TJ-Junction Temperature(℃)

Figure 4 Rdson-JunctionTemperature

Vgs Gate-Source Voltage (V) Figure 1 Output Characteristics

ID- Drain Current (A) Vgs Gate-Source Voltage (V)

Is- Reverse Drain Current (A)

Qg Gate Charge (nC)

Figure 2 Transfer Characteristics

Rdson On-Resistance(mΩ) Figure 5 Gate Charge

ID- Drain Current (A)

Vsd Source-Drain Voltage (V)

Figure 6 Source- Drain Diode Forward

Figure 3 Rdson- Drain Current

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HM50N06K

C Capacitance (pF)

Vds Drain-Source Voltage (V)

TJ-Junction Temperature(℃)

Figure 7 Capacitance vs Vds

Figure 9 BVDSS vs Junction Temperature

ID- Drain Current (A)

Vds Drain-Source Voltage (V)

TJ-Junction Temperature(℃)

Figure 8 Safe Operation Area Figure 10 VGS(th) vs Junction Temperature

Square Wave Pluse Duration(sec) Figure 11 Normalized Maximum Transient Thermal Impedance

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r(t),Normalized Effective Transient Thermal Impedance

HM50N06K

TO-252-2L Package Information

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HM50N06K

ATTENTION:

■ Any and all H&M SEMI products described or contained herein do not have specifications that can handle applications that

require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your H&M SEMI representative nearest you before using any H&M SEMI products described or contained herein in such applications.

■ H&M SEMI assumes no responsibility for equipment failures that result from using products at values

that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all H&M SEMI products described or contained herein.

■ Specifications of any and all H&M SEMI products described or contained herein stipulate the performance, characteristics,

and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment.

■ H&M Semiconductor CO.,LTD. strives to supply high-quality high-reliability products. However, any and all

semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design.

■ In the event that any or all H&M SEMI products(including technical data, services) described or contained herein are

controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law.

■ No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including

photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of H&M Semiconductor CO.,LTD.

■ Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume

production. H&M SEMI believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.

■ Any and all information described or contained herein are subject to change without notice due to

product/technology improvement, etc. When designing equipment, refer to the \"Delivery Specification\" for the H&M SEMI product that you intend to use.

■ This catalog provides information as of Sep.2010. Specifications and information herein are subject to change without notice.

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