Programmable logic device having fast programmable

专利名称：Programmable logic device having fast

programmable logic array blocks and acentral global interconnect array

发明人：Bahram Ahanin,Janusz K. Balicki,Khusrow

Kiani,William Leong,Ken-Ming Li,BezhadNouban

申请号：US08/324860申请日：19941018公开号：US05473266A公开日：19951205

摘要：A programmable logic device has a number of dedicated global control inputlines which interface directly with individual building blocks known as logic array blocks.These lines can be used for clocks, presets, clears, or output-enables. Other logic signallines from the centrally located global interconnect array are selected through an arrayof multiplexers and then interface with the logic array block. A configuration array ofmultiplexers in the logic array block selects from among these inputs, generating localcontrol input signals, the final functions of which are decided by further multiplexing atthe macrocell level within the logic array block.

申请人：ALTERA CORPORATION

代理机构：Townsend and Townsend and Crew

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