Method for programming programmable logic device w

专利名称：Method for programming programmable

logic device with blocks that performmultiplication and other arithmetic functions

发明人：Jennifer Farrugia,Elias Ahmed,Mark

Bourgeault

申请号：US11223193申请日：20050908公开号：US07415692B1公开日：20080819

专利附图：

摘要：A programming method efficiently programs programmable logic devices of

the type having specialized multiplier blocks that include multipliers and other arithmeticfunction elements. Such blocks can be used to perform certain multiplication andmultiplication-related functions more efficiently than general-purpose programmablelogic. In order to efficiently program devices having such specialized multiplier blocks, sothat they are used to their full potential and so that the maximum number of multiplier-related functions can be accommodated on a single programmable logic device, theprogramming method pre-processes the netlist of function blocks in a user's

programmable logic design, grouping multiplication and multiplication-related functionsefficiently. The method takes into account limitations imposed by the structure of thespecialized multiplier blocks, in addition to location constraints imposed by the user andlocation constraints dictated by the need for certain functions be carried out near wherecertain other functions are carried out.

申请人：Jennifer Farrugia,Elias Ahmed,Mark Bourgeault

地址：Woodbridge CA,Toronto CA,Mississauga CA

国籍：CA,CA,CA

代理机构：Ropes & Gray LLP

代理人：Jeffrey H. Ingerman

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