元器件交易网www.cecb2b.comMOTOROLASEMICONDUCTOR TECHNICAL DATACMOS SSIQuad Exclusive “OR” and “NOR” GatesThe MC14070B quad exclusive OR gate and the MC14077B quadexclusive NOR gate are constructed with MOS P–channel and N–channelenhancement mode devices in a single monolithic structure. Thesecomplementary MOS logic gates find primary use where low powerdissipation and/or high noise immunity is desired.•Supply Voltage Range = 3.0 Vdc to 18 Vdc•All Outputs Buffered•Capable of Driving Two Low–Power TTL Loads or One Low–PowerSchottky TTL Load Over the Rated Temperature Range•Double Diode Protection on All Inputs•MC14070B — Replacement for CD4030B and CD4070B Types•MC14077B — Replacement for CD4077B TypeMC14070BMC14077BL SUFFIXCERAMICCASE 632P SUFFIXPLASTICCASE 6MAXIMUM RATINGS* (Voltages Referenced to VSS)SymbolVDDParameterDC Supply VoltageValueUnitVVD SUFFIXSOICCASE 751A– 0.5 to + 18.0ORDERING INFORMATIONMC14XXXBCPMC14XXXBCLMC14XXXBDPlasticCeramicSOICVin, VoutIin, IoutPDInput or Output Voltage (DC or Transient)– 0.5 to VDD + 0.5± 10500– 65 to + 150260Input or Output Current (DC or Transient),per PinPower Dissipation, per Package†Storage TemperatureLead Temperature (8–Second Soldering)mAmW_C_CTA = – 55° to 125°C for all packages.TstgTL*Maximum Ratings are those values beyond which damage to the device may occur.†Temperature Derating:Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_CCeramic “L” Packages: – 12 mW/_C From 100_C To 125_C20 nsVDDIDDVin*CL*Inverted output on MC14077B only.Vin90%50%10%1/f50% DUTY CYCLE20 nsVDDVSSMC14070BQUAD Exclusive ORGate12561213341011MC14077BQUAD Exclusive NORGate12561213341011Figure 1. Power Dissipation Test Circuit and WaveformVDDPULSEGENERATOR*#VSSCL20 nsINPUTtPHLOUTPUTtTHL90%50%10%90%50%10%tPLH20 nsVDDVSSVOHVDD = PIN 14VSS = PIN 7(BOTH DEVICES)PIN ASSIGNMENTIN 1AIN 2AOUTAOUTBIN 1BIN 2BVSS1234567141312111098VDDIN 2DIN 1DOUTDOUTCIN 2CIN 1C*Inverted output on MC14077B only.#Connect unused input to VDD for MC14070B, to VSS for MC14077B.VOLtTLHFigure 2. Switching Time Test Circuit and WaveformsREV 31/94©MOTOROLA CMOS LOGIC DATA Motorola, Inc. 1995MC14070B MC14077B1元器件交易网www.cecb2b.comELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)CharacteristicSymbolVOLVDDVdc5.010155.010155.010155.010155.05.010155.0101515—5.010155.01015Min———– 55_C25_C 125_CMaxMin———Typ #000MaxMin———MaxUnitVdcOutput VoltageVin = VDD or 0 “0” Level0.050.050.05———0.050.050.05———0.050.050.05———“1” LevelVin = 0 or VDDVOH4.959.9514.95———4.959.9514.95———5.010154.959.9514.95———VdcInput Voltage(VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc)(VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc)“0” LevelVILVdc1.53.04.0——————————2.254.506.752.755.508.251.53.04.0——————————1.53.04.0——————————“1” LevelVIHVdc3.57.0113.57.0113.57.011Output Drive Current(VOH = 2.5 Vdc) (VOH = 4.6 Vdc)(VOH = 9.5 Vdc)(VOH = 13.5 Vdc)(VOL = 0.4 Vdc) (VOL = 0.5 Vdc)(VOL = 1.5 Vdc)SourceIOHmAdc– 3.0– 0.– 1.6– 4.20.1..2—————– 2.4– 0.51– 1.3– 3.40.511.33.4—————– 4.2– 0.88– 2.25– 8.80.882.258.8– 1.7– 0.36– 0.9– 2.40.360.92.4—————SinkIOLmAdcInput CurrentInput Capacitance(Vin = 0)Iin± 0.1—0.250.51.0±0.000015.00.00050.00100.0015± 0.17.50.250.51.0± 1.0—7.51530µAdcpFµAdcCinQuiescent Current(Per Package)IDDTotal Supply Current**†(Dynamic plus Quiescent,Per Package)(CL = 50 pF on all outputs, allbuffers switching)ITIT = (0.3 µA/kHz) f + IDDIT = (0.6 µA/kHz) f + IDDIT = (0.9 µA/kHz) f + IDDµAdcOutput Rise and Fall Times**(CL = 50 pF)tTLH, tTHL = (1.35 ns/pF) CL + 33 nstTLH, tTHL = (0.60 ns/pF) CL + 20 nstTLH, tTHL = (0.40 ns/pF) CL + 20 nstTLH,tTHLns5.01015—————————100504020010080——————Propagation Delay Times**(CL = 50 pF)tPLH, tPHL = (0.90 ns/pF) CL + 130nstPLH, tPHL = (0.36 ns/pF) CL + 57 nstPLH, tPHL = (0.26 ns/pF) CL + 37 nstPLH,tPHLns5.01015—————————1757555350150110——————#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.**The formulas given are for the typical characteristics only at 25_C.†To calculate total supply current at loads other than 50 pF:IT(CL) = IT(50 pF) + (CL – 50) Vfkwhere: IT is in µH (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedancecircuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs mustbe left open.MC14070B MC14077B2MOTOROLA CMOS LOGIC DATA元器件交易网www.cecb2b.comOUTLINE DIMENSIONSL SUFFIXCERAMIC DIP PACKAGECASE 632–08ISSUE Y9NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEAD WHENFORMED PARALLEL.4.DIMENSION F MAY NARROW TO 0.76 (0.030)WHERE THE LEAD ENTERS THE CERAMICBODY.INCHESMINMAX0.7500.7850.2450.2800.1550.2000.0150.0200.0550.0650.100 BSC0.0080.0150.1250.1700.300 BSC0 _15 _0.0200.040MILLIMETERSMINMAX19.0519.946.237.113.945.080.390.501.401.652.54 BSC0.210.383.184.317.62 BSC0 _15 _0.511.01–A–14–B–17CL–T–SEATINGPLANEKFD14 PLG0.25 (0.010)MNJTAS14 PLM0.25 (0.010)MTBSDIMABCDFGJKLMNP SUFFIXPLASTIC DIP PACKAGECASE 6–06ISSUE L148B17NOTES:1.LEADS WITHIN 0.13 (0.005) RADIUS OF TRUEPOSITION AT SEATING PLANE AT MAXIMUMMATERIAL CONDITION.2.DIMENSION L TO CENTER OF LEADS WHENFORMED PARALLEL.3.DIMENSION B DOES NOT INCLUDE MOLDFLASH.4.ROUNDED CORNERS OPTIONAL.DIMABCDFGHJKLMNINCHESMINMAX0.7150.7700.2400.2600.1450.1850.0150.0210.0400.0700.100 BSC0.0520.0950.0080.0150.1150.1350.300 BSC0 10 __0.0150.039MILLIMETERSMINMAX18.1619.566.106.603.694.690.380.531.021.782.54 BSC1.322.410.200.382.923.437.62 BSC0 _10 _0.391.01AFCNHGDSEATINGPLANELJKMMOTOROLA CMOS LOGIC DATAMC14070B MC14077B3元器件交易网www.cecb2b.com
OUTLINE DIMENSIONSD SUFFIXPLASTIC SOIC PACKAGECASE 751A–03ISSUE F–A–148–B–17P7 PL0.25 (0.010)MBMNOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDEMOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.GC–T–SEATINGPLANERX 45_FD14 PL0.25 (0.010)MKTBSMASJDIMABCDFGJKMPRMILLIMETERSMINMAX8.558.753.804.001.351.750.350.490.401.251.27 BSC0.190.250.100.250 7 __5.806.200.250.50INCHESMINMAX0.3370.3440.1500.1570.0540.0680.0140.0190.0160.0490.050 BSC0.0080.0090.0040.0090 7 __0.2280.2440.0100.019How to reach us:
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MC14070B MC14077B4
MOTOROLA CMOS LOGIC DATA
