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专利名称：Integrated circuit and method of
implementing a counter in an integratedcircuit
发明人：John R. Hubbard申请号：US107696申请日：20040129公开号：US07149275B1公开日：20061212
专利附图：
摘要：An integrated circuit, such as a programmable logic device, implements a singlebit transition counter in logic. The counter preferably comprises a first stage receiving a
clock signal having a first clock rate and generating a least significant bit in a count. Aplurality of intermediate stages are coupled to the first stage, where each intermediatestage receives an output from the immediate previous stage and an inverted output ofeach other previous intermediate stage, and generates a next most significant bit in acount. Finally, a last stage of the counter receives an inverted output of each previousintermediate stage except the immediate intermediate previous stage and generating amost significant bit in a count.
申请人：John R. Hubbard
地址：Albuquerque NM US
国籍：US
代理人：John J. King
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