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专利名称：Reliability enhancement process发明人：William E. Murphy,Ryan S. Riegle,Richard
Shields,David L. Vos
申请号：US11032526申请日：20050110
公开号：US20060151581A1公开日：20060713
专利附图：
摘要：A method of packaging a semiconductor component with a printed wiring boardis disclosed. The method includes determining a first distance, applying a thin film onto asurface of the semiconductor component such that the thin film is spaced apart from asupport of the semiconductor, applying a solder pad onto the printed wiring board,placing the semiconductor component with the thin film onto the printed wiring board,and positioning the thin film adjacent the solder pad.
申请人：William E. Murphy,Ryan S. Riegle,Richard Shields,David L. Vos
地址：Vestal NY US,Endicott NY US,Endwell NY US,Apalachin NY US
国籍：US,US,US,US
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